摘要 |
The method determines the phase difference in phase locked loops using clock signals (ts) generated in clock generators of communication equipment are synchronized to incoming reference clock signals (rts). The phase difference is determined by a rough phase difference and by a fine phase difference. The fine phase difference is represented by the plurality of delay elements (VE) of a delay line (VZL) that an incoming reference clock signal (rts) traverses up to the following clock signal (ts). A precise determination of the absolute delay time of a delay element (VE) is possible using the method, whereby components' tolerances cause considerable delay time differences of a delay element (VE) or, respectively, of the delay line (VZL). A considerable enhancement of the precision in determining the phase difference of cloak signals (ts) and reference clock signals (rts) and, thus, of the phase locked loops is achieved by the more precise determination of the absolute delay time of a delay element (VE).
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