发明名称 Fabrication process for a static induction transistor
摘要 A semiconductor device, by which a base in which gates are buried can be formed by the junction of semiconductor substrates to each other at a lower temperature, and a fabrication process thereof are provided. Recesses are defined in the top of an N- substrate. A P+ layer is formed on the underside of the N- substrate. P+-Gate regions are each formed in an area ranging from the bottom to lower side portions of the recesses. A metal layer composed of an Au-Sb alloy is formed on the underside of the N+ substrate. The N- substrate and the N+ substrate are subjected to a treatment for removing impurities thereon with an aqueous solution of sulfuric acid and hydrogen peroxide, washed with purified water and dried by a spin dryer. The N- substrate and the N+ substrate are heated at about 350 DEG C. in a hydrogen atmosphere in a state that the tops of the projections between the recesses have been brought into contact with the metal layer provided on the underside of the N+ substrate, whereby the N- substrate and the N+ substrate are joined to each other.
申请公布号 US5702962(A) 申请公布日期 1997.12.30
申请号 US19960739953 申请日期 1996.10.30
申请人 TERASAWA, YOSHIO 发明人 TERASAWA, YOSHIO
分类号 H01L29/74;H01L21/18;H01L21/329;H01L29/739;(IPC1-7):H01L21/265;H01L21/44;H01L21/48 主分类号 H01L29/74
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