发明名称 |
DRAM having multiple column address strobe operation |
摘要 |
A dynamic memory device is described which has multiple column address signal inputs. Data can be stored in the memory and selectively read therefrom. The column address signals are used to control the data communication. During a read operation, any one of the multiple column address signal inputs can be used to output data on all external communication lines. During a write operation, each column address signal input writes data from a portion of the external communication lines to the memory device.
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申请公布号 |
US5703813(A) |
申请公布日期 |
1997.12.30 |
申请号 |
US19960749002 |
申请日期 |
1996.11.14 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
MANNING, TROY A.;MERRITT, TODD;WILLIAMS, BRETT |
分类号 |
G11C7/10;G11C7/22;(IPC1-7):G11C7/00;G11C8/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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