| 摘要 |
In a synchronous semiconductor memory device in which contents of an internal operation is designated by commands applied in synchronization with a clock signal, operations of decoding read, write and precharge commands different from an active command for activating the internal operation are enabled only when the active command is active. Even if a command such as read command other than the active command is applied during an inactive state of internal circuits, other command decoder cannot perform the decoding, so that unnecessary circuit operation can be prevented.
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