发明名称 |
Method and device for analogue to digital conversion |
摘要 |
A parallel SC ADC (switched capacitor analog-to-digital converter) includes a passive sampling technique controlled by a global clock phase to reduce the influence of the sampling phase skew. Since it does not require operational amplifiers for sampling, it is very suitable for high speed applications, and yet it can reduce the sampling-phase-skew-related distortion by 20-40 dB in a high speed, parallel SC ADC. |
申请公布号 |
SE9704895(D0) |
申请公布日期 |
1997.12.29 |
申请号 |
SE19970004895 |
申请日期 |
1997.12.29 |
申请人 |
TELEFONAKTIEBOLAGET L M ERICSSON |
发明人 |
MIKAEL *GUSTAVSSON;NIANXIONG *TAN |
分类号 |
H03M1/36;H03M1/06;H03M1/08;H03M1/12;(IPC1-7):H03M/ |
主分类号 |
H03M1/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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