Device for monitoring phase skew between two clock signals

摘要

The present invention relates to a device for monitoring the phase shift between any two clock signals from among several clock signals (CK1-CKn) of the same frequency. The two clock signals of each possible pair of clock signals respectively enable two successive flip-flops (50, 51) which are initially in separate states, the set of flip-flops being connected in a looped-back shift-register configuration. An alarm signal (AL) is supplied by an exclusive OR gate (43, 53) receiving the outputs of two successive flip-flops of the shift register.