发明名称 Method of manufacturing semiconductor device having multilayer interconnection
摘要 According to the method of manufacturing a semiconductor device having a multilayer interconnection structure, lower wires are formed on a semiconductor substrate. Then, a first reflow SiO2 film having a reflow form is formed on the semiconductor substrate and the lower wires by reacting SiH4 gas with H2O2 in a vacuum at 650 Pa or less within a range from -10 to 10 DEG C. After the first reflow SiO2 film is formed, heat treatment is performed at a predetermined high temperature on the semiconductor substrate on which the first reflow SiO2 film, and a second reflow SiO2 film having a reflow form is formed on the semiconductor substrate and the lower wires by reacting SiH4 gas with H2O2 in a vacuum at 650 Pa or less within a range from -10 to 10 DEG C. The heat treatment step performed after the first reflow SiO2 film forming step and the second reflow SiO2 film forming step subsequent thereto are respectively performed at least once. After the abovementioned steps are finished, upper wires are formed on the second reflow SiO2 film.
申请公布号 US5700720(A) 申请公布日期 1997.12.23
申请号 US19950575211 申请日期 1995.12.20
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HASHIMOTO, HIDETSUNA
分类号 H01L21/3105;H01L21/316;H01L21/768;H01L23/522;(IPC1-7):H01L21/44 主分类号 H01L21/3105
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