Parallel interface circuit having a n-byte buffer and tansmitting the n byte data on a byte-by-byte basis in response to interrupt request signal

摘要

An n-byte buffer is able to store n bytes of data. A interrupt request signal generating circuit interrupts the processor of the peripheral apparatus after receiving the nth byte of the data. Accordingly, only one interrupt operation is needed to receive and input n bytes of data. Consequently, the number of interrupt operations is reduced and the data processing speed is improved.