发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a circuit for realizing a random access memory having different specification of input voltage level, output circuit GND current, clock access time, and power supply voltage (one or two power supply) in one product. SOLUTION: A circuit for altering the delivery time of an output signal depending on an internally or externally generated control signal is provided. More specifically, the delay time of an internal clock signal CLK for controlling an output register is set equal to the delay time of one stage TM1 of a transfer circuit for one path and equal to the delay time of a delay circuit + one stage TM2 of the transfer circuit for another path. The delay time is switched by the internally or externally generated control signal.
申请公布号 JPH09331036(A) 申请公布日期 1997.12.22
申请号 JP19960145429 申请日期 1996.06.07
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 TOYOSHIMA HIROSHI;NISHIO YOJI;HIRAISHI ATSUSHI;KOMIYAJI KUNIHIRO;YAHATA HIDEJI
分类号 G11C7/00;G11C11/401;G11C11/407;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108 主分类号 G11C7/00
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