| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for increasing the C value of a capacitor through a simple process thereby increasing the integration density of parts of a DRAM. SOLUTION: The gate 4, the source S and the drain D of an FET are formed on a silicon base 1 followed by formation of an insulation layer 31. Subsequently, an SiN 30 and a double side rough oxide 40 are deposited sequentially and a rough double side structure is formed by O3 /TEOS system using the oxide as a bottom layer. Thereafter, the insulation layer 31, the SiN 30 and the double side rough oxide 40 are etched. Polysilicon is then deposited by CVD on the entire surface of a chip and a first polysilicon electrode 50 of capacitor is formed by photoetching. According to the method, C value of the capacitor in a DRAM can be increased without increasing the chip area. Alternatively, the integration density can be increased for same C value. |
