| 摘要 |
A computer system includes a host processor, a system memory, a display unit, a pointer device, a VGA controller, and a display memory. The VGA controller communicates with the display memory through an 8-byte wide data bus such that each byte is controlled by a separate column address strobe. To perform a BitBLT operation on a monochrome pattern to be logically combined with 888-RGB color-space formatted data in the display memory, the VGA controller includes a BitBLT control for generating numerous control signals; a color expand circuit for generating in response to such control signals, an 8-byte wide pattern of 888-RGB color-space formatted foreground color data; a circuit for logically combining in response to such control signals, the 8-byte wide pattern of 888-RGB color-space formatted foreground color data and a corresponding 8-byte wide pattern of 888-RGB color-space data received from the 8-byte wide data bus; a bit align circuit for generating in response to such control signals, column address strobe values indicative of bits of the monochrome pattern corresponding to the 8-byte wide pattern of 888-RGB color-space data received from the data bus, by bit aligning the bits of the monochrome pattern; and a memory sequencer for generating in response to such control signals, column address strobe signals corresponding to the values received from the bit align circuit, for strobing into the display memory selected bytes of the logically combined 8-bytes of data.
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