| 摘要 |
A counting circuit including destructive memory elements detection circuits for detecting whether the memory elements are broken, and control circuits for controlling the supply of a break current to the memory elements in a plurality of stages. A current feed circuit supplies the break current for breaking the memory elements in the counting circuit every time a to-be-counted write pulse is input. The control circuit in each stage of the counting circuit supplies the break current from the current feed circuit to the memory element of the stage based on a detection result of the detection circuit only when the memory element of the stage is unbroken while the memory element of a stage preceding the memory element is broken. The control circuit of the first stage supplies the break current to the memory element of the first stage when the memory element of the first stage is unbroken.
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