发明名称 |
Phase offset cancellation technique for reducing low frequency jitters |
摘要 |
A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.
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申请公布号 |
US5699387(A) |
申请公布日期 |
1997.12.16 |
申请号 |
US19930080183 |
申请日期 |
1993.06.23 |
申请人 |
ATI TECHNOLOGIES INC. |
发明人 |
SETO, JIM M. N.;COLBECK, ROGER P.;CHAU, RAYMOND;LEUNG, SIMON C. F. |
分类号 |
H03L7/089;H04L7/033;(IPC1-7):H04L7/033 |
主分类号 |
H03L7/089 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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