发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To secure the ESD breakdown voltage and to increase the pull-up and pull-down operation speeds by preparing an output circuit having a pull-up circuit and a pull-down circuit between a power terminal and an output terminal. SOLUTION: A pMOS transistor TR 37 undergoes the control of its conduction and non-conduction states by the output of an inverter 36, and a pMOS TR 38 has its gate connected to a ground terminal 32 and is always kept in a conduction state with ground voltage VSS applied to the gate in an active mode. The TR 37 and 38 are connected in series between a power terminal 31 and an output terminal 33 and construct an output pull-up circuit. Then an nMOS TR 39 undergoes the control of its conduction and non-conduction states by the output of the inverter 36, and an nMOS TR 40 has its gate connected to the terminal 31 and is always kept in a conduction state with power voltage VDD applied to the gate in an active mode. The TR 39 and 40 are connected in series between the terminals 33 and 32 and construct an output pull-down circuit.
申请公布号 JPH09326685(A) 申请公布日期 1997.12.16
申请号 JP19960142645 申请日期 1996.06.05
申请人 FUJITSU LTD 发明人 TSURU TAKAYUKI
分类号 H01L21/8238;H01L27/092;H03K17/08;H03K17/687;H03K19/0175;H03K19/0948 主分类号 H01L21/8238
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