发明名称 Programmable divider for timing frequency division by integer for pulse train generation, e.g. for infra-red remote control
摘要 The programmable divider inputs a clock signal (CLKO) and produces n-1 logic combinations (Cj) of the counting signal (DECj) from a counter (1). The outputs increase in range and decrease in frequency. From the available outputs a whole number division i is selected to produce the required divided output signal (CLKi).
申请公布号 FR2749722(A1) 申请公布日期 1997.12.12
申请号 FR19960007385 申请日期 1996.06.10
申请人 SGS THOMSON MICROELECTRONICS SA 发明人 LUSINCHI LAURENT
分类号 H03K21/10 主分类号 H03K21/10
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