发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To reduce a chip area by decreasing the number of wirings of a selecting signal of redundant memory cell rows, arranged at side surfaces of plural cell array blocks and the like. SOLUTION: A redundant row encoder 7 coding redundancy selection signals XRD0-XRD3 from a replacing address program circuit at a position near replacing address program circuits 0-0 to 50-3 and outputting them is provided, and an output signal RXDS of the redundant row encoder 7 is transmitted to a block control sections 3-0 to 3-3. The output signal RXDS of the redundant row encoder 7 is decoded by the block control sections 3-0 to 3-3, and a redundant memory cell row of one row among redundant cell arrays 11-0 to 11-3 is selected. Thereby, the number of signal wirings for selecting a redundant memory cell row transmitted to the block control sections are reduced.</p>
申请公布号 JPH09320292(A) 申请公布日期 1997.12.12
申请号 JP19960137152 申请日期 1996.05.30
申请人 NEC CORP 发明人 ISA SATOSHI
分类号 G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C11/401
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