发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To improve reliability of connection of a connection hole constituting a semiconductor integrated circuit device. SOLUTION: In the case where an alignment margin of a contact hole in a wiring wide portion L1b of a wiring pattern L1 is to be set, when the wiring pattern L1 is transferred onto a photoresist film by exposure, a correction amount for compensating for contraction is added to the alignment margin in the longitudinal direction of the wiring wide portion L1b in order to compensate for significant contraction in the longitudinal direction of the wiring pattern L1 from a set value in comparison with the direction of width of the wiring pattern L1 .
申请公布号 JPH09321140(A) 申请公布日期 1997.12.12
申请号 JP19960138835 申请日期 1996.05.31
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 SEKIGUCHI TOSHIHIRO;NAKAI KIYOSHI;ARAI KOJI;TADAKI YOSHITAKA
分类号 H01L21/768;H01L21/3205;H01L21/82;H01L21/8242;H01L27/108 主分类号 H01L21/768
代理机构 代理人
主权项
地址