发明名称 DIGITAL DATA DEMODULATOR
摘要 PROBLEM TO BE SOLVED: To obtain data recovery with a small error rate by allowing a receiver side to easily cope with even a revised baud rate and automatically correcting demodulation distortion. SOLUTION: A frequency shift keying(FSK) modulation signal is waveform- shaped in a comparator 11 and given to a shift register 13 via a shift register 12. Outputs whose phases are different byπ/2 each are given to exclusive (EX) OR circuits 21, 22 in an output stage of the shift register 13 and they are demodulated into demodulation data and a clock signal. The clock from a frequency divider 31 is selected based on frequency division data to easily cope with revision of a baud rate. A duty factor of demodulated data obtained by Ex OR circuits 17, 18 and an AND circuit 19 is measured by a timing generating circuit 32 and a counter 35 and selection of multiplexers 14-16 is controlled based on the measurement content to eliminate demodulation distortion.
申请公布号 JPH09321812(A) 申请公布日期 1997.12.12
申请号 JP19960135251 申请日期 1996.05.29
申请人 TOKYO ELECTRON IND CO LTD 发明人 HATANO TAMIO
分类号 H04L27/14;H04L15/00;(IPC1-7):H04L27/14 主分类号 H04L27/14
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