The voltage pumped supply circuit has a level shifting stage 10 to control the gate electrode of a transfer transistor MP4 and a non overlapping circuit 20 to inhibit the overlapping of the pumping time and a charge transfer time. A well bias voltage stage 30 charges a pumping capacitor in order that the voltage is separate from that of a separate well bias voltage generator 40.
申请公布号
DE19642942(A1)
申请公布日期
1997.12.11
申请号
DE19961042942
申请日期
1996.10.17
申请人
LG SEMICON CO., LTD., CHEONGJU, KR
发明人
KIM, TAE-HOON, SEOUL/SOUL, KR;JUN, YOUNG-HYUN, SEOUL/SOUL, KR