发明名称 AN INTEGRATED CIRCUIT WHICH USES A RECESSED LOCAL CONDUCTOR FOR PRODUCING STAGGERED INTERCONNECT LINES
摘要 An improved multilevel interconnect structure is provided. The interconnect structure includes several levels of conductors, wherein conductors (104) on one level are staggered with respect to conductors (106) on another level. In densely spaced interconnect areas, interposed conductors (104) are burried in intermetallic dielectric layer (103) drawn to dissimilar elevational levels to lessen the capacitive coupling between the interconnects.
申请公布号 WO9747039(A1) 申请公布日期 1997.12.11
申请号 WO1997US02509 申请日期 1997.02.18
申请人 ADVANCED MICRO DEVICES, INC. 发明人 FULFORD, H., JIM, JR.;BANDYOPADHYAY, BASAB;DAWSON, ROBERT;HAUSE, FRED, N.;MICHAEL, MARK, W.;BRENNAN, WILLIAM, S.
分类号 H01L21/302;H01L21/3065;H01L21/316;H01L21/3205;H01L21/768;H01L21/822;H01L23/52;H01L23/522;H01L27/04;(IPC1-7):H01L23/522 主分类号 H01L21/302
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