发明名称 Device for addressing a cache memory of a compressing motion picture circuit
摘要 A device for addressing a cache memory of a motion picture compression circuit, executing series of comparisons to estimate the motion of a current window of pixels of a current picture with respect to a reference window of a preceding picture, includes a first cache memory partitioned into four physical segments of equal size. Each physical segment is adapted to contain one half-macroblock of the reference window, and a circuit for addressing the first cache memory, the addressing being different for a motion estimation related to a current window of even rank and for a motion estimation related to a current window of odd rank.
申请公布号 US5696698(A) 申请公布日期 1997.12.09
申请号 US19950423580 申请日期 1995.04.18
申请人 SGS-THOMSON MICROELECTRONICS S.A. 发明人 HERLUISON, JEAN-CLAUDE;BAUER, JEAN-LUC
分类号 G06F12/08;G06T7/20;H04N5/14;H04N7/26;H04N7/32;(IPC1-7):G06K15/00;H04N7/12 主分类号 G06F12/08
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