Dual tracking differential manchester decoder and clock recovery circuit

摘要

A dual clock tracking decoder for use in a local station of a token ring local area network extracts the mostly repetitive bit-cell transitions corresponding to the imbedded clock of a received phase encoded message from which a short term and a long term moving average estimate is made of the clock transitions relative to a local stable clock. The short term moving average adjusts rapidly to short term jitter and is used to sample the received phase encoded message twice each bit-cell and generate an intermediate phase encoded message that is resynohronized with a clock derived from the long term moving average of the estimated imbedded clock transition and having a rate that is twice the bit-cell rate of the received phase encoded message. This provides a mechanism for sampling the states of the incoming message with a clock that is adaptive to fast short term jitter while restoring an imbedded clock that is only responsive to slow longer term jitter. The latter clock is used to resynohronize the intermediate phase encoded message.