Method for increasing capacitance of an HSG rugged capacitor using a phosphine rich oxidation and subsequent wet etch

摘要

A capacitor and method for forming the capacitor having HSG polysilicon with reduced dielectric bridging, increased capacitance, and minimal depletion effects. A first polysilicon layer is deposited and doped with impurities to increase conductivity. A second polysilicon layer is deposited at a temperature adjusted to cause a nucleation of the second polysilicon layer. As a result of the nucleation the second polysilicon layer is altered to resemble hemispherical grains. Next the first and second polysilicon layers are oxidized in an oxygen/phosphine ambient. During the oxidation portions of the first and second polysilicon layers are consumed forming a phosphine rich oxide layer on the surface of the hemispherical grains and in portions of the first polysilicon layer lying between the grains which are reduced in size due to the oxidation. A wet etch is then performed to remove the oxide layer. Phosphorous ions are driven into the hemispherical grains during the oxidation thereby doping the grains. The oxidation is controlled such that the surface area of the hemispherical grains and first polysilicon layer retain a roughened surface area that is at least equal to a surface area of the hemispherical grains prior to the oxidation. The size of the grains decreases and the distance between the grains increases as a result of the oxidation. Following the etch a dielectric layer is deposited to overlie the rough polysilicon. The thickness of the dielectric layer tends to be uniform due to the smaller grains and greater distance between the grains. The process is completed with a deposition of a cell plate layer overlying the dielectric layer. Depletion is reduced or eliminated due to the doping of the grains.