发明名称 Serial clock synchronization circuit
摘要 A low cost and easily implemented apparatus and method for synchronizing serially connected clock circuits is ideally suited to audio applications. The circuit takes data from a bitstream clock source and from the local source and counts the number of pulses received from each. A desired clock count is calculated based as a multiple of the ratio of the bitstream clock source frequency to the local clock signal frequency. Based on the samples received from the bitstream clock relative to the local clock at a later point in time, samples are either repeated or dropped to correct any error in the bitstream signal.
申请公布号 US5696462(A) 申请公布日期 1997.12.09
申请号 US19960620703 申请日期 1996.03.21
申请人 LSI LOGIC CORPORATION 发明人 MATURI, GREG;AULD, DAVID R.;KHUBCHANDANI, ANIL
分类号 H03K5/26;H03L7/00;H04L7/033;(IPC1-7):H03K5/26 主分类号 H03K5/26
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