| 摘要 |
A resetting apparatus for a microcomputer has a voltage detection circuit for detecting a voltage of a main power line, a reset circuit for providing a reset signal to the microcomputer, and a reset cancel circuit for controlling the reset circuit so that the reset circuit does not output the reset signal. The microcomputer enters a stand-by mode and stops outputting a watchdog pulse signal when a power source is turned off and the detected voltage of the voltage detection circuit becomes below a prescribed stand-by set voltage. When the watchdog pulse signal is stopped, the reset circuit gives the reset signal to the microcomputer. Hereby, the microcomputer is again put under an operating condition, even though the power source is turned off and the stand-by mode sets in. To avoid this, the reset cancel circuit controls the reset circuit so that the reset circuit does not output the reset signal when the detected voltage is below the stand-by set voltage. Thus, when the power source is turned off, the microcomputer surely enters the stand-by mode, and a wasteful power consumption is avoided.
|
