发明名称 INSPECTION METHOD FOR MULTICHIP MODULE
摘要 <p>PROBLEM TO BE SOLVED: To provide a multichip module inspecting method by which the inspection time can be shortened, the inspection cost can be lowered, and productivity can be improved. SOLUTION: At the time when a multichip module is inspected after semiconductor chips 6a-6d are mounted on a circuit substrate 1 and electrically connected with the circuit substrate 1 as to form vertical connections by connecting output terminals and the input terminals of respective semiconductor chips 6a-6d, the output terminals of the semiconductor chips 6a-6d are set in low impedance state and the outputs are inspected and at the time when respective semiconductor chips 6a-6d are inspected, the output terminals are switched to be in high impedance state and logic signals are sent to the input terminals of the respective semiconductor chips 6a-6d and the outputs of respective semiconductor chips are inspected.</p>
申请公布号 JPH09311161(A) 申请公布日期 1997.12.02
申请号 JP19960126971 申请日期 1996.05.22
申请人 MATSUSHITA ELECTRON CORP 发明人 FUJITA NORIYUKI
分类号 G01R31/317;(IPC1-7):G01R31/317 主分类号 G01R31/317
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