DELAYING TIME CALCULATING METHOD AND LOGICAL SIMULATION DEVICE

摘要

PROBLEM TO BE SOLVED: To improve the operation frequency of a logical circuit by optimizing the propagation delaying time of a cell for every cell. SOLUTION: After a circuit diagram reading part 11 reads a circuit diagram, a cell selection part 12 selects a cell to calculate a delaying time. A cell kind judging part 13 judges the kind of the cell selected by the selection part 12, and an error reading part 14 reads the maximum error of the delaying time corresponding to the kind of the selected cell from a delay library 10. A delaying time calculation part 15 calculates the prescribed delaying time of the selected cell. A maximum/minimum calculation part 16 calculate a maximum delaying time by multiplying the prescribed delaying time calculated by the calculation part 15 and the maximum error read from the delay library 10 by the reading part 14. A simulation executing part 17 executes simulation by using a maximum delaying time calculated by the calculation part 16.