| 摘要 |
A logic circuit (3) comprises IIL aggregates (4a, 4b, 4c) each consisting of a plurality of IIL elements. Each of the IIL aggregates (4a, 4b, 4c) is supplied with an injector current (Iinj) from an injector current source (2) through a wiring (5). A monitoring element (6) is formed by utilizing an IIL element which needs the longest time until the injector current therein attains a predetermined value. When the injector current applied to an injector current input end (9) attains the predetermined value, potentials of an output terminal (10) and a reset signal input terminal (7) fall. Therefore, a reset operation is performed in accordance with the IIL element which needs the longest time until the injector current attains the predetermined value.
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