发明名称 COMPRESSED IMAGE AUDIO DECODER
摘要 PROBLEM TO BE SOLVED: To ensure an operation margin of a CPU by providing a reception buffer with respect to other packets than image data into a memory RAM of the CPU and providing a reception buffer for an image packet into a packet separator, and to omit a memory exclusively for a data buffer. SOLUTION: An image packet is fed to an exclusive reception buffer 27 and data are transferred via a decoder interface 24 on request of a video decoder 5. Furthermore, an audio packet reception buffer 134, an additional data packet reception buffer 135 or the like are provided in the inside of a RAM 13 in addition to a system decoding work area 131 or the like and packets other than the image are transferred to a packet reception buffer to each element via a bus interface 26. A CPU 11 reads transport stream packets stored in each reception buffer in the order of arrival according to a control program stored in a ROM 12 and conducts the processing to each element.
申请公布号 JPH09307865(A) 申请公布日期 1997.11.28
申请号 JP19960120244 申请日期 1996.05.15
申请人 HITACHI LTD 发明人 FUJII YUKIO;OKU MASUO;KOMI HIRONORI
分类号 H04N19/42;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/423;H04N19/426;H04N19/44;H04N19/65;H04N19/70;H04N19/85;H04N19/89 主分类号 H04N19/42
代理机构 代理人
主权项
地址