发明名称 HEADER DETECTION DEVICE
摘要 PROBLEM TO BE SOLVED: To decrease the number of logical gates constructing a circuit and to reduce a layout area by using the comparators which detect the specific patterns and using no conventional priority encoder. SOLUTION: This header detector previously stores the bit stream to be processed in a memory 101 in bite alignment and therefore has not always to use a priority encoder to calculate the number of continuous zeros. Instead, the detector uses the comparators 103 and 104 which can detect the specific patterns to detect a header. Thus, an overall circuit scale of the header detector can be reduced and a layout of a smaller area is attained even when the fast bit processing capability is required to the detector and the number of bits to be processed at a time is increased.
申请公布号 JPH09307455(A) 申请公布日期 1997.11.28
申请号 JP19960117625 申请日期 1996.05.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 IMANISHI HIROSHI
分类号 G06F7/04;H03M7/40;(IPC1-7):H03M7/40 主分类号 G06F7/04
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