| 摘要 |
PROBLEM TO BE SOLVED: To reduce the circuit scale by using a memory of a small capacity such as a line memory to provide an output of image data for one line each of a composited image without intermission between lines thereby reducing the memory capacity. SOLUTION: A line synchronizing signal and a picture element clock are given both to X and Y counters 33, 34. The counter 33 designates addresses of an image memory 35 in the main scanning direction. The counter 33 is preset by a line synchronizing signal and counts up synchronously with the image clock to increment an address of the memory 35 in the main scanning direction. The counter 34 designates the subscanning direction addresses of the memory 35. The counter 34 is reset at read start and increments an address of the memory 35 in the sub scanning direction. Through the address designation by the counters 33, 34 in this way, the addressing is synchronously with an original image read by a scanner to read a composited image from the memory 35. |
