Power FET control circuit for lamp switching

摘要

The circuit includes a charge pump (8,9,10) which supplies an output signal to the gate of the power FET (1) and a depletion FET (16) with its load path used for discharging the gate-source capacitance of the power FET. The power FET has a source coupled with a load (2) and a drain coupled with a voltage supply terminal (3). The source of the depletion FET is biased in the direction of the supply voltage (UBB) dependent on a control signal of a switching arrangement (30,14,15). Further, the source of the depletion FET is coupled to the supply voltage terminal via a further transistor (30).