发明名称 HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICES HAVING MULTIPLE DIMENSION BIT LINES
摘要 <p>The long-existing tight pitch layout problems for dynamic random access memory devices have been solved by using a multiple-dimension bit line structure. A novel memory access procedure provides the capability to make internal memory refresh completely invisible to external users. By use of such memory architecture, higher performance DRAM can be realized without degrading memory density. The requirements for system support are also simplified significantly.</p>
申请公布号 WO1997044789(A1) 申请公布日期 1997.11.27
申请号 US1997008957 申请日期 1997.05.23
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址