| 摘要 |
<p>A byte swapping device includes first and second data ports and data path logic coupled between the first and second data ports. The byte swapping device is employed in a data processing system comprising a data storage device configured to store bytes of data, a processor which reads data from the data storage device and writes data to the data storage device, and the bytes wapping device coupled between the data storage device and the processor. The first data port is coupled to the storage device and the second data port is coupled to the processor. The storage device is typically a system memory or peripheral device controller. The processor processes data in a first endian format, i.e., big-endian or little-endian format, and at least a portion of the data stored in the data storage device is in the opposite byte ordering. The byte swapping device selectively byte swaps data transferred between the processor and storage device. In the preferred embodiment, data conversion apertures, or ranges, are defined in the processor address space and the processor provides address signals to the byte swapping device. The byte swapping device selectively byte swaps the data based upon the relationship between the addresses received by the byte swapping device and the data conversion apertures. In one embodiment, the processor programs aperture storage elements with the values of the data conversion apertures. In another embodiment, the data conversion apertures are fixed. In an alternate embodiment, the processor provides control signals to the byte swapping device, wherein the byte swapping device selectively converts the data in response to the control signals from the processor. In one embodiment, the processor is configured to execute a characteristic instruction set, wherein the processor provides the one or more control signals to the byte swapping device in response device in response to which instruction in the instruction set the processor executes.</p> |
