Inverted amplifying circuit

摘要

The present invention relates to an inverted amplifying circuit comprising: i) an odd number of stages of serial CMOS inverters; ii) a feedback capacitance for feeding back the output of the last-stage CMOS inverter to the input of the first-stage CMOS inverter; and iii) a balancing resistance, consisting of a pair of resistances, each of which connects a capacitance in serial to the output of a CMOS inverter at a step after the first-stage and before the last-stage CMOS inverters. <IMAGE>