发明名称 System and method for generating fractional length delay lines in a digital signal processing system
摘要 A sampled data, non-integer delay line interpolation structure includes a sampled data delay line, two allpass filters, each having an associated read pointer for reading data at a corresponding integer position of the delay line, an alternating crossfader that alternatingly crossfades between the outputs of the two allpass filters, plus a controller that controls when the read position of each allpass filter is updated and also controls when the filter coefficient of each allpass filter is updated. A specified delay length value is sampled by the controller each time the crossfade orientation of the alternating crossfader is changed, and from that value the controller generates a new read pointer and filter coefficient for allpass filter to which the structure will next crossfade. The new read pointer is an integer that corresponds to an integer portion of the specified delay length, and the filter coefficient corresponds to a fractional portion of the specified delay length. After updating the read pointer and filter coefficient of one allpass filter, the alternating crossfader outputs the signal generated by the other allpass filter for a first number of sample periods until the updated filter "warms up." Then the alternating crossfader crossfades to the signal generated by the updated allpass filter over a second number of sample periods. At the end of the crossfade operation the specified delay line length is sampled again, the reader position and filter coefficient of the other allpass filter is updated, and then the crossfade operation repeats.
申请公布号 AU2660097(A) 申请公布日期 1997.11.26
申请号 AU19970026600 申请日期 1997.04.03
申请人 THE BOARD OF TRUSTEES OF LELAND STANFORD JUNIOR UNIVERSITY 发明人 SCOTT A. VAN DUYNE;DAVID A. JAFFE;GREGORY P. SCANDALIS;TIMOTHY S. STILSON
分类号 G10H1/12;G06F17/17 主分类号 G10H1/12
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