| 摘要 |
<p>The invention provides for a method of eliminating scan hold time failures of a scan chain (8,118). The method uses information resulting from the distribution of a clock throughout an integrated circuit. In particular, a scan chain (8,118) is reordered according to the results of the distribution of the clock signal. The distribution of the clock signal provides groups of sequential circuit elements (10,110) that form the scan chain (8,118). The method also includes reordering the sequential circuit elements (10,110) within at least one group (30) according to a clock skew of the clock signal within the at least one group (30). The method further includes ordering the groups (30) according to a clock skew of the clock signal between the groups (30). <IMAGE></p> |
