| 摘要 |
An N bit (where N is an integer) converter having separately formed voltage dividing resistance regions includes a semiconductor substrate of a first conductivity type. (N+1) well regions of a second conductivity type are each formed separately on the semiconductor substrate and an input resistance region of the first conductivity type having a high concentration of impurities is formed in a first well region of the (N+1) well regions. (N-1) ladder resistance regions of the first conductivity type having a high concentration of impurities respectively are formed in (N-1) well regions, each resistance of the (N-1) ladder resistance regions being approximately two times greater than a resistance of the input resistance region. An output resistance region of the first conductivity type having a high concentration of impurities is formed in an (N+1)th well region of the (N+1) well regions, a resistance of the output resistance region being approximately equal to the resistance of the input region. (N+1) impurity diffusion regions of the second conductivity type having a high concentration of impurities are formed in the respective (N+1) well regions, separated from the respective input, ladder, and output resistance regions for applying backward bias voltages to the respective input, ladder, and output resistance regions formed in the (N+1) well regions.
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