| 摘要 |
The method reduces miss pattern formation caused by step difference, narrow effect caused by bird's beak, and leakage current flowing between active regions. The method includes steps: a) forming a cconductive layer on substrate; b) patterning with bit line shape after forming photo sensitive layer on the conductive layer; c) forming impurity region by injecting ion into exposed conductive layer; d) patterning for leaving ony the conductive layer corresponding impurity region; e) forming silicide layer on boundary layer between the residual conductive layer and the impurity region; and f) forming 1st, 2nd oxide layers and 1st, 2nd polysilicon layers to form control gate.
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