The cell includes a p-type substrate (110) within which is formed an n-type trough (114). Also provided is a heavily doped n-type region (112) at a distance from the trough and to which a main voltage (Vcc) is supplied. Between the trough and the heavily doped n-region is defined a parasitic channel region (118) over which is formed an insulated gate (124). A reset voltage is applied to the gate by which the trough region is reset.
申请公布号
DE19719326(A1)
申请公布日期
1997.11.20
申请号
DE19971019326
申请日期
1997.05.08
申请人
NATIONAL SEMICONDUCTOR CORP., SANTA CLARA, CALIF., US
发明人
CHI, MINH-HWA, PALO ALTO, CALIF., US;MERRILL, RICHARD BILLINGS, DALY CITY, CALIF., US;BERGEMONT, ALBERT, PALO ALTO, CALIF., US