发明名称 |
Vertical double-gate field effect transistor |
摘要 |
A vertical double-gate field effect transistor includes a source layer, an epitaxial channel layer and a drain layer arranged in a stack on a bulk or SOI substrate. The gate oxide is thermally grown on the sides of the stack using differential oxidation rates to minimize input capacitance problems. The gate wraps around one end of the stack, while contacts are formed on a second end. An etch-stop layer embedded in the second end of the stack enables contact to be made directly to the channel layer.
|
申请公布号 |
US5689127(A) |
申请公布日期 |
1997.11.18 |
申请号 |
US19960610949 |
申请日期 |
1996.03.05 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHU, JACK OON;HSU, LOUIS LU-CHEN;MANDELMAN, JACK ALLAN;SUN, YUAN-CHEN;TAUR, YUAN |
分类号 |
H01L21/8238;H01L21/336;H01L27/092;H01L29/78;H01L29/786;(IPC1-7):H01L29/76;H01L29/94 |
主分类号 |
H01L21/8238 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|