发明名称 |
SIGNAL PROCESSING DEVICE, SIGNAL RECORDING DEVICE AND SIGNAL REPRODUCING DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a signal processing device, a signal recording device and a signal reproducing device in which signal processing such as equalizing processing is realized with small scale and inexpensive hardware. SOLUTION: A decimation filter 4 applies down-sampling to a digital signal of 64fs /1-bit outputted from aΣΔmodulator 3 (fs : sampling signal). A signal processing circuit 5 applies equalizing processing to a fs /24-bit digital signal from the decimation filter 4. A delay device 6 delays the fs /24-bit digital signal by a processing time in the signal processing circuit 5. A subtractor 7 calculates a difference between the fs /24-bit digital output signal from the signal processing circuit 5 and the fs /24-bit digital delay signal. An interpolation filter 8 applies oversampling to the result of the subtraction of the fs /24 bit digital signal to obtain a 24 bit digital signal with a sampling frequency of 64fs . A delay device 9 delays the 64fs /1-bit digital signal from theΣΔmodulator 3 by a total processing time of the decimation filter 4, the signal processing circuit 5, the subtractor 7 and the interpolation filter 8.
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申请公布号 |
JPH09298468(A) |
申请公布日期 |
1997.11.18 |
申请号 |
JP19960109750 |
申请日期 |
1996.04.30 |
申请人 |
SONY CORP |
发明人 |
NISHIO FUMITAKA;TSUCHIDA YUJI |
分类号 |
G11B20/10;H03G5/00;H03H17/00;H03M3/02;H03M7/32;H04B1/00;H04S1/00;(IPC1-7):H03M7/32 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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