| 摘要 |
PROBLEM TO BE SOLVED: To enhance an operating speed by respectively interposing switching elements in between respective drains of p and n MOS cross couples and VCC and VSS to quicken potential changes after the completion of a reset period. SOLUTION: In a reset period, two rest control signalsϕ1 ,ϕ1x being in a complementary relation becomes that the signalϕ1 =1 and the signalϕ1x =0 and a pMOS 4 and an nMOS 5 interposed in between a pMOS cross couple 12 are turned ON and, moreover, switching elements 21, 23 respectively interposed in between the drain and VSS and the drain and VCC are also turned ON. As a result, potentials of nodes N1 , N2 in the reset period, that is, potentials of an OUT and an OUTx both become low potentials of the order of VSS≈0 and large potential differences equivalent to VCC-VSS are applied in between sources and gates of pMOSs 2, 3 constituting the couple 12. Thus, even though VCC is made to be 1V, the threshold voltage of the pMOSs 2, 3 is made to be 0.5V, since voltages between the sources and the gates are larger than 0.5V, the rising of output node is quickened and the high-speed property of an amplifier is never impaired.
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