Parallel processor

摘要

A parallel processor for processing a plurality of pieces of data includes a number of unitary processing units provided in parallel equal to the number of pieces of data. Each of the unitary processing units includes a memory circuit connected to a processing element which exchanges data with two adjoining unitary processing units. Each of the processing elements includes a full adder, a logical operation circuit for performing a logical operation on two inputs connected to a first input of the full adder and a plurality of selector circuits. A first selector circuit selects first data from memory circuits of the unitary processing unit and an adjoining unitary processing unit. A second selector circuit selects second data from memory circuits of the unitary processing unit and an adjoining unitary processing unit. A third selector circuit selects the second data selected by the second selector circuit as a first input to the logical operation circuit. A fourth selector circuit selects the first data selected by the first selector circuit as a second input to the logical operation circuit. A fifth selector circuit selects the second data selected by the second selector circuit as a second input to the full adder. A sixth selector circuit selects the carrier output of the full adder as a third input to the full adder.