发明名称 |
CIRCUIT AND METHOD FOR DRIVING CAPACITIVE LOAD |
摘要 |
PROBLEM TO BE SOLVED: To provide a driving circuit which is capable of driving with low power consumption even when capacitive load is at a low voltage. SOLUTION: A capacitive load 7 with its end grounded and an inductive element are connected in series through an analog circuit and connected with another capacitor 2 one end of which is grounded to form an LC serial resonance circuit. A PMOS switching element 5 is connected between the ungrounded terminal of the capacitive load 7 and a positive driving voltage source Vdd and an NMOS switching element 6 is connected between the ungrounded terminal of the above capacitive load 7 and the ground terminal to form the drive circuit.
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申请公布号 |
JPH09297563(A) |
申请公布日期 |
1997.11.18 |
申请号 |
JP19960342769 |
申请日期 |
1996.12.06 |
申请人 |
NEC CORP |
发明人 |
NOSE TAKASHI;HAYAMA HIROSHI |
分类号 |
G02F1/133;G09G3/36;H04N5/66;(IPC1-7):G09G3/36 |
主分类号 |
G02F1/133 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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