| 摘要 |
<p>PROBLEM TO BE SOLVED: To output data which is stored in synchronism with a high frequency in a memory. SOLUTION: An address value outputted by a counter 3 is supplied to a ROM 4-1 and a delay element 5-1. Then the address value is supplied to ROMs 4-2 to 4-4 through a specific number of delay elements 5-sequentially. Then the ROMs 4-1 to 4-4 operate with a clock of 20MHz, and data stored in addresses of the address value are respectively outputted to a multiplexer 7. The multiplexer 7 operates with a clock of 80MHz, selects one of the outputs of the ROMs 4-1 to 4-4, and supplies it to a D-FF(flip-flop) 8.</p> |
