发明名称 SYSTEM AND METHOD FOR GENERATING FRACTIONAL LENGTH DELAY LINES IN A DIGITAL SIGNAL PROCESSING SYSTEM
摘要 <p>A sampled data, non-integer delay line interpolation structure (150) includes a sampled data delay line (156), two allpass filters (162, 164), each having an associated read pointer (158, 160) for reading data at a corresponding integer position of the delay line, an alternating crossfader (166) that alternatingly crossfades between the outputs of the two allpass filters, plus a controller (154) that controls when the read position of each allpass filter is updated and also controls when the filter coefficient of each allpass filter is updated. A specified delay length value is sampled by the controller each time the crossfade orientation of the alternating crossfader is changed, and from that value the controller generates a new read pointer and filter coefficient for allpass filter to which the structure will next crossfade.</p>
申请公布号 WO1997042583(A1) 申请公布日期 1997.11.13
申请号 US1997005610 申请日期 1997.04.03
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