Semiconductor memory device

摘要

The semiconductor memory device includes a first port for reading only the DOUTP0. A second port reads and writes the DOUTP0 and the DINP1. Two bit lines, BITP0 and BITP1, are provided for the first and second ports respectively. Several word lines WORDi0 and WORDi1, for the first and second ports has each of the first word lines set one-to-one with respect to that of the second word lines. Several memory cells MC0, MC1 are provided between the first and second bit lines. The first sensing amplifier SAP0 is connected to the first bit line to output the first amplified signal according to the voltage of the first bit line. The second sensing amplifier SAP1 is connected to the second bit line to output the second amplified signal according to the voltage of the second bit line. An output device writes signal WBP1 according to a input signal and outputs an inverted writing signal from the inverted output. The writing procedure on the second port is completed by successively performing the first and the second writing cycles.