发明名称 Supplying central processor with instruction data for fast microprocessor, micro-controller and signal processor
摘要 The central processing unit (1) takes the prepared instruction data from a memory (2). The CPU selectively acquires the instruction data read from the memory or other, neutral instruction data. The neutral data is defined instruction data which causes no operations in the CPU unit, or which causes an operation which has no significant effect on the execution of the program being run by the central unit. The neutral data is permanently available or is very rapidly accessed from a separate memory or generation device.
申请公布号 DE19618290(A1) 申请公布日期 1997.11.13
申请号 DE19961018290 申请日期 1996.05.07
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 MEHRGARDT, SOENKE, DR.-ING., 79232 MARCH, DE;BREILMANN, JOCHEN, DIPL.-ING., 40885 RATINGEN, DE;MOTT, PAUL, DIPL.-ING., 81247 MUENCHEN, DE;LUDWIGS, MICHAEL, DIPL.-ING., 13585 BERLIN, DE
分类号 G06F9/38;(IPC1-7):G06F9/34 主分类号 G06F9/38
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