METHOD OF PRODUCING VERTICAL MOSFETS

摘要

A vertical power MOSFET which has a markedly decreased on-resistance per unit area. A groove having a gate structure is substantially formed by the LOCOS method prior to forming the p-type base layer and the n<+>-type source layer. Then, the p-type base layer (16) and the n<+>-type source layer (4) are formed by double diffusion being self-aligned with the LOCOS oxide film (65) and, at the same time, a channel (5) is set in the sidewall (51) of the LOCOS oxide film. Then, the LOCOS oxide film is removed to form a U-groove thereby to constitute the gate structure. That is, the channel is set by double diffusion which is self-aligned to the LOCOS oxide film, i.e., the channels are correctly set symmetrically in the sidewalls on both sides of the groove. Therefore, the position of the U-groove is not deviated with respect to the end of the base layer, and the length of the bottom surface of the U-groove can be minimized. This makes it possible to greatly decrease the size of the unit cell and to greatly decrease the on-resistance per unit area.